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[嵌入式/ARM] ADIXFP10Gbps收发器参考设计

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admin 发表于 2013-3-31 19:12:57 | 显示全部楼层 |阅读模式

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XFP Chipset and Reference Design Simplify 10 Gbps Transceivers

Analog Devices supports your MSA compatible optical transceiver designs with best in class products AND best in class support. Complete high performance chips sets support SFP for Sonet, Ethernet and Fiberchannel at rates from 100Mbps to 4.25G and XFP at 10G. Full reference designs speed time to market, simplify evaluation and give a head start on your next transceiver design.



Features

9.9 Gbps to 11.3 Gbps data rate

DFB, FP, or VCSEL operation

Exceeds 20% SONET optical eye margin over temperature

–19 dBm receive sensitivity

Unparalleled jitter performance

Supports full digital diagnostics

Reference design includes Gerbers, SW, BOM, host board, and GUI interface

ICs

TIA:

ADN2821, 11.1 Gbps 3.3V Low Noise High Gain Transimpedance Amplifier

LDD:

ADN2525, 10 Gbps Active Back-match, Differential Laser Diode Driver

ADN2530, 10 Gbps Active Back-Termination VCSEL Driver

XFP Signal Conditioner:

ADN2926 / ADN2927, Standalone Transmit and Receive Functions in a 4 mm x 4 mm LFCSP

ADN2928, XFP Single Chip Transceiver IC

Microcontroller:

ADuC7020, Precision Analog Microcontroller: 45MIPS ARM7 Flash MCU + 5-Ch 12-Bit ADC + Quad 12-Bit DAC

下图为ADN2928的应用电路图.

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