可编程控制器评估板简化工业过程控制系统设计(中)

The AD5422 has an internal 10-ppm/℃ max voltage reference that can be enabled on all four output channels in the PLC evaluation system. Alternatively, the ADR445 ultralow-noise XFET® voltage reference, with its 0.04% initial accuracy and 3 ppm/℃, can be used on two output channels, allowing performance comparison and a choice of internal vs. external reference, depending on the total required system performance.

Input Module: The input module design specifications are similar to those of the output module. High resolution and low noise are generally important. In industrial applications, a differential input is required when measuring low-level signals from thermocouples, strain gages, and bridge-type pressure sensors to reject common-mode interference from motors, ac power lines, or other noise sources that inject noise into the analog inputs of the analog-to-digital converter (ADCs).

Sigma-delta ADCs are the most popular choice for input modules, as they provide high accuracy and resolution. In addition, internal programmable-gain amplifiers (PGAs) allow small input signals to be measured accurately. Figure 7 shows the input module design used in the evaluation system. The AD7793 3-channel, 24-bit sigma-delta ADC is configured to accommodate a large range of input signals, such as 4 mA to 20 mA, ±10 V, as well as small signal inputs directly from sensors.



Figure 7. Input module design.

Care was taken to allow this universal input design to be easily adapted for RTD/thermocouple modules. As shown, two input terminal blocks are provided per input channel. One input allows for a direct connection to the AD7793. The user can program the internal PGA to provide analog gains up to 128. The second input allows the signal to be conditioned through the AD8220 JFET-input instrumentation amplifier. In this case, the input signal is attenuated, amplified, and level shifted to provide a single-ended input to the ADC. In addition to providing the level shifting function, the AD8220 also features very good common-mode rejection, important in applications having a wide dynamic range.

The low-power, high-performance AD7793 consumes
To measure a 4 mA to 20 mA input signal, a low-drift precision resistor can be switched (S4) into the circuit. In this design, its resistance is 250 Ω, but any value can be used as long as the generated voltage is within the input range of the AD8220.

S4 is left open when measuring a voltage.

Isolation is required for most input-module designs. Figure 7 shows how isolation was implemented on one channel of the PLC evaluation system. The ADuM5401 4-channel digital isolator uses isoPower®6 technology to provide 2.5-kV rms signal and power isolation. In addition to providing four isolated signal channels, the ADuM5401 also contains an isolated dc-to-dc converter that provides a regulated 5-V, 500-mW output to power the analog circuitry of the input module.

Complete System: An overview of the complete system is shown in Figure 8. The ADuC7027 precision analog microcontroller7  is the main system controller. Featuring the ARM7TDMI® core, its 32-bit architecture allows easy interface to 24-bit ADCs. It also supports a 16-bit thumb mode, which allows for greater code density if required. The ADuC7027 has 16 kB of on-board flash memory and allows interfacing to up to 512 kB external memory. The ADP3339 high-accuracy, low-dropout regulator (LDO) provides the regulated supply to the microcontroller.



Figure 8. System-level design.

Communication between the evaluation board and the PC is provided via the ADM3251E isolated RS-232 transceiver. The ADM3251E incorporates isoPower technology—making a separate isolated dc-to-dc converter unnecessary. It is ideally suited to operation in electrically harsh environments or where RS-232 cables are frequently plugged in or unplugged, as the RS-232 pins, Rx and Tx, are protected against electrostatic discharges of up to ±15 kV.

Evaluation System Software and Evaluation Tools: The evaluation system is very versatile. Communication with the PC is achieved using LabView.8  The firmware for the microcontroller (ADuC7027) is written in C, which controls the low-level commands to and from the ADC and DAC channels.

Figure 9 shows the main screen interface. Pull-down menus on the left side allow the user to choose active ADC and DAC channels. Under each ADC and DAC menu there is a pull-down range menu, which is used to select the desired input and output ranges to be measured and controlled. The following input and output ranges are available: 4 mA to 20 mA, 0 mA to 20 mA, 0 mA to 24 mA, 0 V to 5 V, 0 V to 10 V, ±5 V, and ±10 V. Small signal input ranges can also be accommodated directly on the ADC by using its internal PGA.



Figure 9. Evaluation software main screen controller.

The ADC Configure screen, shown in Figure 10, is used to set the ADC channel, update rate, and PGA gain; to enable or disable excitation currents; and for other general-purpose ADC settings. Each ADC channel is calibrated by connecting the corresponding DAC output channel to the ADC input terminal and adjusting each range. When using this method of calibration, therefore, the offset and gain errors of the AD5422 dictate the offset and gain of each channel. If these provide insufficient accuracy, ultrahigh-precision current and voltage sources can be used for calibration if desired.



Figure 10. ADC Configure screen.

After selecting the ADC’s input channel, input range, and update rate, we can now use the ADC Stats screen, shown in Figure 11, to display some measured data. On this screen, the user chooses the number of data points to record; the software generates a histogram of the selected channel, calculates the peak-to-peak and rms noise, and displays the results. In the measurement shown here, the input is connected through the AD8220 to the AD7793: gain = 1, update rate = 16.7 Hz, number of samples = 512, input range = ±10 V, input voltage = 2.5 V. The peak-to-peak resolution is 18.2 bits.



Figure 11. ADC Stats screen.

In Figure 12, the input is connected directly to the AD7793, bypassing the AD8220. The on-chip 2.5-V reference is connected directly to the AIN+ and AIN– channels of the AD7793, providing a 0-V differential signal to the ADC. The peak-to-peak resolution is 20.0 bits. If the ADC conditions remain the same but the 2.5-V input is connected through the AD8220, the peak-to-peak resolution degrades to 18.9 bits for two reasons: at low gains, the AD8220 contributes some noise to the system; and the scaling resistors that provide the input attenuation result in some range loss to the ADC. The PLC evaluation system allows the user to change the scaling resistors to optimize the ADC’s full-scale range, thereby improving the peak-to-peak resolution.



Figure 12. AD7793 performance.

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