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[基础电路] CD4066应用电路

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admin 发表于 2013-2-23 21:06:00 | 显示全部楼层 |阅读模式

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CD4066中文资料:CD4066是四双向模拟开关,主要用作模拟或数字信号的多路传输。引出端排列与CC4016一致,但具有比较低的导通阻抗。另外,导通阻抗在整个输入信号范围内基本不变。CD4066由四个相互独立的双向开关组成,每个开关有一个控制信号,开关中的p和n器件在控制信号作用下同时开关。这种结构消除了开关晶体管阈值电压随输入信号的变化,因此在整个工作信号范围内导通阻抗比较低。与单通道开关相比,具有输入信号峰值电压范围等于电源电压以及在输入信号范围内导通阻抗比较稳定等优点。但若应用于采保电路,仍推荐CD4016。
   当模拟开关的电源电压采用双电源时,例如 =﹢5V, =﹣5V(均对地0V而言),则输入电压对称于0V的正、负信号电压(﹢5V~﹣5V)均能传输。这时要求控制信号C=“1”为+5V,C=“0”为-5V,否则只能传输正极性的信号电压。
    20121119053003144621410.jpg
   CD4066引脚功能图
   20121119053003941471411.jpg
  内部方框图
  Absolute Maximum Ratings 绝对最大额定值: Supply Voltage电源电压(VDD) ?0.5V to +18VInput Voltage输入电压 (VIN) ?0.5V to VCC+0.5VStorage Temperature Range储存温度范围 (TS) ?65℃ to +150℃Power Dissipation功耗 (PD)Dual-In-Line 普通双列封装 700 mW Small Outline 小外形封装500 mW Lead Temperature 焊接温度(TL) Soldering, 10 seconds)(焊接10秒) 300℃ Recommended Operating Conditions 建议操作条件: Supply Voltage电源电压(VDD) 3V to 15VInput Voltage输入电压 (VIN)0V to VDDOperating Temperature Range工作温度范围 (TA) ?55℃ to +125℃
   DC Electrical Characteristics 直流电气特性:
  Symbol 符号 Parameter 参数 Conditions 条件 ?55℃ +25℃ +125℃ Units 单位 最小 最大 最小 典型最大最小最大IDD Quiescent Device Current静态电流 VDD = 5V0.250.01 0.257.5 μA VDD = 10V0.50.01 0.515 VDD = 15V1.00.01 1.030 SIGNAL INPUTS AND OUTPUTS RON “ON” Resistance RL = 10 kΩ to (VDD ? VSS/2) VC = VDD, VSS to VDD VDD = 5V800270 10501300 Ω VDD = 10V310120 400550 VDD = 15V20080 240320 ΔRON Δ“ON” Resistance Between Any 2 of 4 Switches RL = 10kΩ to (VDD ? VSS/2) VCC = VDD, VIS = VSS to VDD VDD = 10V10 Ω VDD = 15V5 IIS Input or Output Leakage Switch “OFF” VC = 0±50±0.1 ±50±500 nACONTROL INPUTS VILC LOW Level Input Voltage 输入低电平电压 VIS = V SS and VDD VOS = V DD and VSS IIS = ± 10μA VDD = 5V1.52.25 1.51.5 V VDD = 10V3.04.5 3.03.0 VDD = 15V4.06.75 4.04.0 VIHC HIGH Level Input Voltage 输入高电平电压 VDD = 5V 3.53.5 2.753.5V VDD=10V (Note 7) 7.07.0 5.57.0VDD = 15V 11.011.0 8.2511.0IIN Input Current 输入电流 VDD?VSS = 15V VDD≥VIS≥VSS VDD≥VC≥VSS?0.1 ?10?5 ?0.1 ?0.1μA0.1 10?5 0.1 0.1
   AC Electrical Characteristics 交流电气特性:
  Symbol 符号 Parameter 参数 Conditions 条件 最小 典型 最大 Units 单位 tPHL, tPLHPropagation Delay Time Signal Input to Signal Output信号输入到信号输出传递延迟时间VC = VDD, CL = 50 pF, (Figure 1)RL = 200kVDD = 5V 2555 nsVDD = 10V 1535 VDD = 15V 1025 tPZH, tPZLPropagation Delay Time Control Input to Signal Output High Impedance to Logical LevelRL = 1.0kΩ, CL = 50pF, (Figure 2, Figure 3) VDD = 5V125nsVDD = 10V60 VDD = 15V50 tPHZ, tPLZPropagation Delay Time Control Input to Signal Output Logical Level to High Impedance Sine Wave Distortion Frequency Response-Switch “ON” (Frequency at ?3 dB)RL = 1.0kΩ, CL = 50pF VDD = 5V125nsVDD = 10V60 VDD = 15V50 VC = VDD = 5V, VSS = ?5V RL = 10 kΩ, VIS = 5Vp-p, f= 1 kHz, (Figure 4) 0.1% VC = VDD = 5V, VSS = ?5V, RL = 1 kΩ, VIS = 5Vp-p, 20 Log10 VOS/VOS (1 kHz)?dB,(Figure 4) 40MHz Feedthrough — Switch “OFF” (Frequency at ?50 dB) Crosstalk Between Any Two Switches (Frequency at ?50 dB) Crosstalk; Control Input to Signal Output Maximum Control InputVDD = 5.0V, VCC = VSS = ?5.0V, RL = 1 kΩ, VIS = 5.0Vp-p, 20 Log10, VOS/VIS = ?50 dB, (Figure 4) 1.25VDD=VC(A) =5.0V; VSS = VC(B) = 5.0V, RL1kΩ, VIS(A) = 5.0Vp-p, 20 Log10, VOS(B)/VIS(A) = ?50dB (Figure 5) 0.9 MHzVDD =10V,RL=10kΩ, RIN=1.0kΩ,VCC=10V Square Wave, CL =50pF(Figure 6)150 mVp-pRL=1.0kΩ, CL=50pF, (Figure 7)VOS(f) = ½ VOS(1.0 kHz)VDD = 5.0V 6.0MHzVDD = 10V 8.0VDD = 15V 8.5CISSignal Input Capacitance信号输入电容8.0 pFCOS Signal Output Capacitance信号输出电容VDD = 10V 8.0 pFCIOSFeedthrough Capacitance馈电容VC = 0V 0.5 pFCINControl Input Capacitance控制输入电容5.0 7.5pF
   20121119053003957091412.jpg
  图1 CD4066是四双向模拟开关驱动继电器应用电路
  CD4066是四双向模拟开关,集成块SCR1~SCR4为控制端,用于控制四双向模拟开关的通断。当SCR1接高电平时,集成块①、②脚导通,+12V→K1→集成块①、②脚→电源负极使K1吸合;反之当SCR1输入低电平时,集成块①、②脚开路,K1失电释放,SCR2~SCR4输入高电平或低电平时状态与SCR1相同。
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