[原创]Protel 铺铜的相关问题

以下是Protel中铺铜（铜连接GND网络）发生的错误，错误在红色部分。该怎么样解决？谢谢！
Protel Design System Design Rule Check
PCB File : \DIY\Protel Projects\ClassDesign_PCB.PCBDOC
Date : 2007-1-21
Time : 14:29:38
Processing Rule : Width Constraint (Min=0.6mm) (Max=0.8mm) (Preferred=0.7mm) (InNet('+12'))
Rule Violations :0
Processing Rule : Width Constraint (Min=0.6mm) (Max=0.8mm) (Preferred=0.7mm) (InNet('+5'))
Rule Violations :0
Processing Rule : Width Constraint (Min=0.6mm) (Max=0.8mm) (Preferred=0.7mm) (InNet('GND'))
Violation Polygon Track (70.37mm,31.75mm)(71.374mm,31.75mm) Top Layer Actual Width = 0.254mm
Violation Polygon Track (78.994mm,26.67mm)(79.998mm,26.67mm) Top Layer Actual Width = 0.254mm
Violation Polygon Track (78.994mm,25.666mm)(78.994mm,26.67mm) Top Layer Actual Width = 0.254mm
Violation Polygon Track (77.99mm,26.67mm)(78.994mm,26.67mm) Top Layer Actual Width = 0.254mm
Violation Polygon Track (68.834mm,18.034mm)(69.838mm,18.034mm) Top Layer Actual Width = 0.254mm
Violation Polygon Track (67.83mm,18.034mm)(68.834mm,18.034mm) Top Layer Actual Width = 0.254mm
Violation Polygon Track (68.834mm,17.03mm)(68.834mm,18.034mm) Top Layer Actual Width = 0.254mm
Violation Polygon Track (46.736mm,50.546mm)(47.74mm,50.546mm) Top Layer Actual Width = 0.254mm
Rule Violations :8
Processing Rule : Hole Size Constraint (Min=0.0254mm) (Max=2.54mm) (All)
Rule Violations :0
Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)
Rule Violations :0
Processing Rule : Width Constraint (Min=0.254mm) (Max=0.254mm) (Preferred=0.254mm) (All)
Rule Violations :0
Processing Rule : Clearance Constraint (Gap=0.254mm) (All),(All)
Rule Violations :0
Processing Rule : Broken-Net Constraint ( (All) )
Rule Violations :0
Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
Rule Violations :0

Violations Detected : 8
Time Elapsed : 00:00:03